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    Real World Multicore Embedded Systems

    Real World Multicore Embedded Systems

    Forfatter: info mangler
    Bog
    • Format
    • Bog, hardback
    • Engelsk

    Beskrivelse

    This Expert Guide gives you the techniques and technologies in embedded multicore to optimally design and implement your embedded system. Written by experts with a solutions focus, this encyclopedic reference gives you an indispensable aid to tackling the day-to-day problems when building and managing multicore embedded systems. Following an embedded system design path from start to finish, our team of experts takes you from architecture, through hardware implementation to software programming and debug. With this book you will learn: • What motivates multicore • The architectural options and tradeoffs; when to use what • How to deal with the unique hardware challenges that multicore presents • How to manage the software infrastructure in a multicore environment • How to write effective multicore programs • How to port legacy code into a multicore system and partition legacy software • How to optimize both the system and software • The particular challenges of debugging multicore hardware and software

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    Størrelse og vægt
  • Vægt1240 g
    • coffee cup img
    10 cm
    book img
    19,1 cm
    23,5 cm

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    Java Instrumentation Python Communication Dependency Synchronization Parallelism ADA Data integrity Amp dram Assembly language Observability Threads Serial SRAM Divide-and-Conquer Shared memory Atomicity Transactional memory Distributed memory Programming models Task parallelism Partitioning Software-Tool Caché Processor Shared resources Hypervisor Message-passing DMA Nexus Deadlock Interconnection networks Programming language Multicore SoC Multicore architecture Parallel software Parallel hardware Multicore architectures Parallelization Accelerator RTOS Data parallelism NUMA Pthreads Multicore Hardware accelerators Parallel Trace Multicore Processors Concurrency UMA Virtualization Consolidation Shared Data SMP Synchronize JTAG Triggering Mutex Application to hardware mapping Anti-dependency BDM (background debug mode) Atomic transaction Cache coherency Bare metal Asymmetric multi-processing Compare and swap (CAS) Aurora Serdes Communication libraries Co-processor Bare iron CriticalBlue Prism Cross-trigger Concurrent Critical Region ETM (embedded trace) Data escape Data races Functional parallelism communication structures Coresight Hardware engine Fork/join Heterogeneous multicore Homogeneous multicore Data race ICE (in-circuit emulator) Deep copy IEEE 5001 IEEE 11497 hardware accelerator Interconnect design Loop distance Interrupt priority Multicore operating system Multicore performance optimization Memory architectures Memory barrier MESI Lightweight processing Many-core interconnections Multi-threaded mutable Memory consistency models Non-atomic operation Multicore RTOS OS partition Multiprocessor interconnection Parallelize Heavyweight processing Hardware synchronization Output dependency Packet processing Pareon OCP-IP IEEE 11491 Readwritelock Race condition immutable Recursive data Request-response trace (RRT) Read-after-write Shared-exclusion Software pipeline Shared queue Spinlock SoC interconnects Stale data Software barrier system virtualization thread-safety Transactor (debug block) True dependency Unsynchronized I/O virtualization thread-safe Timestamp Lock-free programming Loop-carried dependency Multicore OS Multicore SoC interconnects Symmetric multi-processing Test and set Memory bandwidth Multicore debug Multicore partitioning Thread affinity Multicore benchmark PDtrace (processor data trace) Priority Inversion operating system Ordering dependency OS container Scratch pad Write-after-read Processing architectures Shared resource Synchronization libraries Uniform memory Write-after-write

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