Computer Architecture

- A Quantitative Approach

  • Format
  • Bog, paperback
  • Engelsk

Beskrivelse

Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC. True to its original mission of demystifying computer architecture, this edition continues the longstanding tradition of focusing on areas where the most exciting computing innovation is happening, while always keeping an emphasis on good engineering design.

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Detaljer
Størrelse og vægt
  • Vægt1860 g
  • coffee cup img
    10 cm
    book img
    19,1 cm
    23,5 cm

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    Reliability Google Scalability Computer architecture Computer organization Speculation Parallelism Locks Moore's law Cloud computing Energy efficiency Integrated circuit cluster Multiprocessor Virtual-machines Multithreading Pipeline Availability Nvidia Memory Hierarchy Caché Locality Virtual Memory Datacenter Inclusión Performance analysis Memory System Graphics Processing Unit (GPU) Fermi Compiler Cache coherence Utility computing Supercomputer Dynamic Scheduling MapReduce Throughput Rack Amazon Web Services AWS Deep Neural Network (DNN) Instruction set ARM Cortex-A53 Branch predictor Costs of WSCs Data-level parallelism Data dependence Data hazards Distributed shared memory (DSM) DNN Accelerator Domain-specific architectures (DSAs) Dual in-line memory module (DIMM) Dynamic random access memory (DRAM) Loop-level parallelism Embedded computer Flexible datacenter accelerator Hardware-based speculation Graphic dynamic random access memory (GDRAM) Intel Core i7 Image processing unit (IPU) Inference datacenter accelerator Instruction pipeline Intel Core i7 6700 Memory Consistency Microsoft Catapult Power utilization effectiveness (PUE) Personal mobile device Intel Crest real-time performance SIMD (single instruction multiple data) Architecture Snoopy cache coherence Warehouse-scale computers (WSCs). MIMD (multiple instruction multiple data) Mobile GPU Uniform memory access (UMA) Vector architecture Scatter-Gather Pixel visual core Power management unit (PMU) Price-quantitative analysis Roofline model shard Tensor processing Tesla GPU Tomasulo's algorithm

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